Careers at World's Best Companies — In India

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Senior Design Engineer - Memory Subsystem

Nvidia • Posted 1 week ago

Bengaluru, India Mid • 4+ years ['Onsite'] ASIC Design Engineer Full Time

Join NVIDIA as a Senior Design Engineer focusing on state-of-the-art memory subsystems for industry-leading GPUs and SOCs. You will drive micro-architecture development, RTL implementation, and post-silicon verification. This role involves making critical architectural trade-offs to meet performance and power requirements while ensuring timing-clean, high-quality designs for AI and graphics.

Senior ASIC Design Engineer - XBAR IP

Nvidia • Posted 3 weeks ago

Bengaluru, India Senior • 5+ years ['Onsite'] ASIC Engineer Full Time

Join NVIDIA as a Senior ASIC Design Engineer focusing on high-performance memory subsystem components for GPUs. You will drive micro-architecture development, RTL implementation, and timing closure. This role involves defining critical features and ensuring design excellence across consumer graphics, autonomous vehicles, and artificial intelligence platforms.

Senior Platform Solutions Engineer - Hardware

Nvidia • Posted 3 weeks ago

Bengaluru, India Senior • 5+ years ['Onsite'] ASIC Engineer Full Time

NVIDIA seeks a Senior Platform Solutions Engineer to lead silicon and board bringup, validation, and debugging for advanced GPU and SoC platforms. This role involves developing test plans, resolving complex ASIC issues, and improving validation methodologies to deliver high-performance hardware solutions for consumer, server, and automotive markets.

Senior Physical Design Engineer

Nvidia • Posted 4 weeks ago

Bengaluru • Hyderabad, India Senior ['Onsite'] Physical Design Engineer Full Time

Join NVIDIA as a Senior Physical Design Engineer to develop industry-leading GPUs and SOCs. You will optimize RTL2GDS flows, manage floor planning, and perform physical verification. This role involves building efficient EDA tool flows and using TCL/Python scripting to enhance PPA across advanced technology nodes.

ASIC Design Engineer

Nvidia • Posted 1 month ago

Bengaluru, India Principal • 25+ years ['Onsite'] ASIC Engineer Full Time

Join NVIDIA as an ASIC Design Engineer to design and implement world-leading SoCs. You will define micro-architecture, develop RTL, and oversee silicon bring-up for advanced computing platforms. This role involves working across verification and physical design teams to deliver high-performance features for AI, graphics, and autonomous vehicle technologies.

Senior ASIC Engineer, Switch SoC

Nvidia • Posted 1 month ago

Bengaluru, India Mid • 4+ years ['Onsite'] ASIC Engineer Full Time

Expert SOC Design and Integration Engineer needed for high-speed Switch Silicon chips. Responsibilities include defining system-level methodologies, managing SOC assembly, and driving cross-functional execution. Requires 4+ years of ASIC experience, proficiency in RTL design, and scripting skills to deliver high-performance networking solutions in a fast-paced environment.

Senior ASIC Design Engineer - NOC IP

Nvidia • Posted 2 months ago

Bengaluru, India Senior • 7+ years ['Onsite'] ASIC Engineer Full Time

Join NVIDIA as a Senior ASIC Design Engineer developing cutting-edge memory subsystem components for industry-leading GPUs. You will lead micro-architecture and RTL development, making critical architectural trade-offs to meet performance and power targets. This role spans the entire design cycle, from initial specification through synthesis, timing, and post-silicon debug.

ASIC Design Engineer - Security Subsystem

Nvidia • Posted 5 months ago

Hyderabad • Bengaluru, India Principal • 25+ years ['Onsite'] ASIC Design Engineer Full Time

Join NVIDIA as an RTL Design Engineer focusing on security subsystems for next-generation chips. You will own micro-architecture and RTL development, making architectural trade-offs for performance and power. This role involves driving design modules from concept through silicon validation across automotive, GPU, and DPU platforms to ensure robust system security.

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